首页|嵌入式系统|显示技术|模拟IC/电源|元件与制造|其他IC/制程|消费类电子|无线/通信|汽车电子|工业控制|医疗电子|测试测量
首页 > 分享下载 > 嵌入式系统 > 【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)

【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)

资料介绍
【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)
由于CPLD(complex programmable logic devices)的灵活性、低功耗和低成本,更多的设计者在他们的系统设计中正在使用CPLD。
With the flexibility of complex programmable logic devices (CPLDs),
together with their low power consumption and low cost, more designers
are using CPLDs in their system design. Using MAX® II CPLDs in your
design can be very straightforward when you have some guidelines to
follow, even if you are not a frequent CPLD user. This application note
aims to provide the necessary guidelines on using MAX II devices in your
design, and help you avoid some of the problems users frequently face.
MAX II CPLD
Design Guidelines

December 2007, Ver 1.1 Application Note 428



Introduction With the flexibility of complex programmable logic devices (CPLDs),
together with their low power consumption and low cost, more designers
are using CPLDs in their system design. Using MAX II CPLDs in your
design can be very straightforward when you have some guidelines to
follow, even if you are not a frequent CPLD user. This application note
aims to provide the necessary guide
标签:AlteraCPLDMAXII
【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)
本地下载

评论