利用直接时钟控制技术实现 DDR2 SDRAM 物理层

利用直接时钟控制技术实现 DDR2 SDRAM 物理层
Application Note: Virtex-4 Family

R DDR2 SDRAM Physical Layer Using
Direct-Clocking Technique
XAPP701 (v2.0) March 12, 2007 Author: Tze Yi Yeoh



Summary This application note describes the DDR2 SDRAM physical layer design using the
direct-clocking technique in a VirtexTM-4 device. The direct-clocking technique utilizes some of
the architectural features unique to the Virtex-4 family, for