RLDRAM II Memory Interface for Virtex-5 FPGAs

RLDRAM II Memory Interface for Virtex-5 FPGAs
Application Note: Virtex-5 FPGAs

R RLDRAM II Memory Interface for
Virtex-5 FPGAs
Authors: Benoit Payette and Rodrigo Angel
XAPP852 (v2.3) May 14, 2008


Summary This application note describes how to use a Virtex-5 device to interface to Common I/O (CIO)
Double Data Rate (DDR) Reduced Latency DRAM (RLDRAM II) devices. The reference design
targets two CIO DDR RLDRAM II devices at a cl