利用 CoolRunner-II CPLD 设计 16b/20b 编码器/解码器

利用 CoolRunner-II CPLD 设计 16b/20b 编码器/解码器
Application Note: CoolRunner-II CPLD

R
Design of a 16b/20b Encoder/Decoder
Using a CoolRunner-II CPLD
XAPP391 (v1.0) January 15, 2003


Summary This document details the VHDL implementation of a fibre channel byte-oriented transmission
encoder and decoder in a Xilinx CoolRunner-II CPLD. CoolRunner CPLDs are the lowest
power CPLDs available today and can be utilized in any network design where reliabl