CoolRunner-II 串行外设接口主机

CoolRunner-II 串行外设接口主机
Application Note: CoolRunner-II CPLD

R
CoolRunner-II Serial Peripheral Interface
Master
XAPP386 (v1.0) December 24, 2002


Summary This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in
a Xilinx CoolRunner-II CPLD. CoolRunner-II CPLDs are the lowest power CPLDs available,
making this the perfect target device for an SPI Master. To obtain the VHDL code