CoolRunner XPLA3 串行外设接口主机

CoolRunner XPLA3 串行外设接口主机
Application Note: CoolRunner CPLD

R
CoolRunner Serial Peripheral Interface
Master
XAPP348 (v1.2) December 13, 2002


Summary This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in
a Xilinx CoolRunner XPLA3 CPLD. CoolRunner CPLDs are the lowest power CPLDs
available, making this the perfect target device for an SPI Master. To obtain the VHDL code