使用 XC9500XL CPLD 进行设计

使用 XC9500XL CPLD 进行设计
APPLICATION NOTE

1
Designing With XC9500XL CPLDs

XAPP112 January 22, 1999 (Version 1.1) Application Note

Summary
This application note will help designers get the best results from XC9500XL CPLDs. Included are practical details on such
topics as pin migration, timing, mixed voltage interfacing, power management, PCB layout, high speed considerations and
JTAG best practices.
Xilinx Family
XC9500XL



Introduction Function Block Interconnect
To get the best performance from a