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Creating a Controllable Oscillator Using the Virtex-5 FPGA IODELAY Primitive

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Creating a Controllable Oscillator Using the Virtex-5 FPGA IODELAY Primitive
Application Note: Virtex-5 FPGAs

Creating a Controllable Oscillator Using the
Virtex-5 FPGA IODELAY Primitive
Author: Martin Kellermann
XAPP872 (v1.0) April 28, 2009


Introduction. This application note describes how to use the Virtex-5 FPGA input/output delay (IODELAY)
primitive as a means to create a high-precision adjustable oscillator with a wide tuning range.
标签:XilinxFPGA
Creating a Controllable Oscillator Using the Virtex-5 FPGA IODELAY Primitive
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