Cryptographic Algorithm Using a Multi-Board FPGA Architecture 1

Cryptographic Algorithm Using a Multi-Board FPGA Architecture
Nios II Embedded Processor Design Contest―Outstanding Designs 2005




First Prize


Cryptographic Algorithm Using a Multi-
Board FPGA Architecture

Institution: Indian Institute of Technology, Chennai

Participants: G. Ananth and U.S. Karthikeyan

Instructor: Dr. V. Kamakoti




Design Introduction
Information security has assumed a significant importance in today’s world, especially because minor
breaches can lead to major risks in the fields of national security and other e-commerce applications and
transactions. This necessitates implementing cryptographic algorithms in hardware to achieve better
security and faster response as opposed to any software implementation. A promising solution
combining high flexibility with the speed and physical security of tradi