H.264 VBS-BMA-Based Hardware Infrastructure Implementation on an FPGA

The block matching method, which is used for motion estimation, plays a key role in motion picture coding systems. Replacing the fixed-block-size block matching algorithm (FBS-BMA) with the H.264 variable-block-size block matching algorithm (VBS-BMA) addresses the issue that video object changes cannot be processed effectively, further improving video compression efficiency. Our design reduces the complex H.264 VBS-BMA calculation and features low latency, low power, and high throughput, delivering better coding performance.

H.264 VBS-BMA-Based Hardware Infrastructure Implementation on an FPGA




Second Prize


H.264 VBS-BMA-Based Hardware
Infrastructure Implementation on an
FPGA

Institution: Ching Yun University/ Department of Electronic Engineering

Participants: Wenxian Qian, Songzhi Gu

Instructor: Ou Qianmin




Design Introduction
The block matching method, which is used for motion estimation, plays a key role in motion picture
coding systems. Replacing the fixed-block-size block matching algorithm (FBS-BMA) with the H.264
variable-block-size block matching algorithm (VBS-BMA) addresses the issue that video object
changes cannot be processed effectively, further improving video compression efficiency. Our design
reduces the complex H.264 VBS-BMA calculatio