74137

74系列文档资料，对数字电路设计尤为重要，特别适合新手
Decoder With Address Latches (Inverted Output)
MM54HC137 MM74HC137 3-to-8 Line
November 1995




MM54HC137 MM74HC137 3-to-8 Line
Decoder With Address Latches
(Inverted Output)
General Description
This device utilizes advanced silicon-gate CMOS technolo- The 54HC 74HC logic family is speed function and pin-out
gy to implement a three-to-eight line decoder with latches compatible with t