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美国SanJoséStateUniversity逻辑设计课件(XilinxFPGA和Verilog)

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这是课程说明:

EE178 is a class for students interested in designing synchronous digital circuits using Xilinx FPGA devices as the prototyping medium. EE178 is a hands-on lab class where students will complete a number of design projects in Verilog-HDL using the Xilinx ISE6 software and Spartan-3 Starter Kit boards. Students are responsible for providing their own lab equipment. If you enroll in this class, you should anticipate spending roughly $100 on lab equipment in lieu of a required textbook.

It is my personal goal to make EE178 the best undergrad elective in the Electrical Engineering department. To this end, I appreciate any constructive feedback you might like to give. Please don't hesitate to contact me.

If you are from another class, another university, or even another universe, I encourage you to use the material here if it helps you learn something about digital design or the use of Xilinx FPGAs. I only ask that if you re-distribute or significantly re-use what you find here, you include proper bibliographical citation of this work.
美国SanJoséStateUniversity逻辑设计课件(XilinxFPGA和Verilog)
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