基于FPGA的利用傅里叶变换将音频信号转化为图形通过VGA接口输出到显示器上

fft_prj_final\.lso
.............\455555.bmm
.............\arwz.log
.............\auto_project.ipf
.............\auto_project_1.ipf
.............\bitgen.xmsgs
.............\clk7seg.tfi
.............\ClockManger.tfi
.............\ClockManger.v
.............\ClockManger_arwz.ucf
.............\clock_generator_0_wrapper.ngc
.............\device_usage_statistics.html
.............\dlmb_cntlr_wrapper.ngc
.............\dlmb_wrapper.ngc
.............\edkBmmFile.bmm
.............\edkBmmFile_bd.bmm
.............\ffttest.v
.............\fuse.log
.............\ggg.v
.............\ilmb_cntlr_wrapper.ngc
.............\ilmb_wrapper.ngc
.............\.pcore_dir\blk_mem_gen_ds512.pdf
.............\..........\ClockManger.vhd
.............\..........\ClockManger.xaw
.............\..........\ClockManger_arwz.ucf
.............\..........\coregen.cgp
.............\..........\coregen.log
.............\..........\coregen.rsp
.............\..........\core_resources.txt
.............\..........\DDS.asy
.............\..........\DDS.gise
.............\..........\DDS.ise
.............\..........\dds.ncf
.............\..........\DDS.ngc
.............\..........\DDS.sym
.............\..........\DDS.v
.............\..........\DDS.veo
.............\..........\DDS.vhd
.............\..........\DDS.vho
.............\..........\DDS.xco
.............\..........\DDS.xise
.............\..........\DDS_flist.txt
.............\..........\DDS_readme.txt
.............\..........\....xdb\tmp\ise\version
.............\..........\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.............\..........\.......\...\...\............\..................\.........\HDProject_StrTbl
.............\..........\.......\...\...\............\..................\__stored_object_table__
.............\..........\.......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.............\..........\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.............\..........\.......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.............\..........\.......\...\...\............\................\................\dpm_project_main_StrTbl
.............\..........\.......\...\...\..REGISTRY__\Autonym\regkeys
.............\..........\.......\...\...\............\bitgen\regkeys
.............\..........\.......\...\...\............\...init\regkeys
.............\..........\.......\...\...\............\common\regkeys
.............\..........\.......\...\...\............\.pldfit\regkeys
.............\..........\.......\...\...\............\dumpngdio\regkeys
.............\..........\.......\...\...\............\fuse\regkeys
.............\..........\.......\...\...\............\HierarchicalDesign\HDProject\regkeys
.............\..........\.......\...\...\............\hprep6\regkeys
.............\..........\.......\...\...\............\idem\regkeys
.............\..........\.......\...\...\............\libgen\regkeys
.............\..........\.......\...\...\............\map\regkeys
.............\..........\.......\...\...\............\netgen\regkeys
.............\..........\.......\...\...\............\.gc2edif\regkeys
.............\..........\.......\...\...\............\...build\regkeys
.............\..........\.......\...\...\............\..dbuild\regkeys
.............\..........\.......\...\...\............\par\regkeys
.............\..........\.......\...\...\............\.latgen\regkeys
.............\..........\.......\...\...\............\ProjectNavigator\regkeys
.............\..........\.......\...\...\............\................11\regkeys
.............\..........\.......\...\...\............\runner\regkeys
.............\..........\.......\...\...\............\simgen\regkeys
.............\..........\.......\...\...\............\taengine\regkeys
.............\..........\.......\...\...\............\.rce\regkeys
.............\..........\.......\...\...\............\.sim\regkeys
.............\..........\.......\...\...\............\vhpcomp\regkeys
.............\..........\.......\...\...\............\.logcomp\regkeys
.............\..........\.......\...\...\............\xpwr\regkeys
.............\..........\.......\...\...\............\XSLTProcess\regkeys
.............\..........\.......\...\...\............\xst\regkeys
.............\..........\.......\...\...\............\_ProjRepoInternal_\regkeys
.............\..........\.......\...\ise.lock
.............\..........\DDS_xmdf.tcl
.............\..........\fft.asy
.............\..........\fft.gise
.............\..........\fft.ise
.............\..........\fft.ncf
.............\..........\fft.ngc
.............\..........\fft.sym
.............\..........\fft.v
.............\..........\fft.veo
.............\..........\fft.vhd
.............\..........\fft.vho
.............\..........\fft.xco
.............\..........\fft.xise
.............\..........\fft_flist.txt
.............\..........\fft_readme.txt
.............\..........\....xdb\tmp\ise\version
.............\..........\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject