基于Quartus2的lte信道估计Veriloghdl代码

基于 quartus 2 的 lte 信道估计verilog hdl代码 只有功能仿真 时序仿真自己加sdc文件并且调整testbench的clk才能做出来

CHANNEL_ESTIMATION_PROJECT\CDIV.v
..........................\CDIV.v.bak
..........................\CHANNEL_ESTIMATION.v
..........................\CHANNEL_ESTIMATION.v.bak
..........................\CHANNEL_ESTIMATION_VERILOG.asm.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.done
..........................\CHANNEL_ESTIMATION_VERILOG.dpf
..........................\CHANNEL_ESTIMATION_VERILOG.eda.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.fit.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.fit.smsg
..........................\CHANNEL_ESTIMATION_VERILOG.fit.summary
..........................\CHANNEL_ESTIMATION_VERILOG.flow.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.map.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.map.smsg
..........................\CHANNEL_ESTIMATION_VERILOG.map.summary
..........................\CHANNEL_ESTIMATION_VERILOG.pin
..........................\CHANNEL_ESTIMATION_VERILOG.qpf
..........................\CHANNEL_ESTIMATION_VERILOG.qsf
..........................\CHANNEL_ESTIMATION_VERILOG.qws
..........................\CHANNEL_ESTIMATION_VERILOG.sof
..........................\CHANNEL_ESTIMATION_VERILOG.sta.rpt
..........................\CHANNEL_ESTIMATION_VERILOG.sta.summary
..........................\CHANNEL_ESTIMATION_VERILOG_nativelink_simulation.rpt
..........................\DATA_BUF.v
..........................\DATA_BUF.v.bak
..........................\DB_RAM.bsf
..........................\DB_RAM.qip
..........................\DB_RAM.v
..........................\DB_RAM_bb.v
..........................\DB_RAM_inst.v
..........................\db_ram_syn.v
..........................\DB_RAM_wave0.jpg
..........................\DB_RAM_wave1.jpg
..........................\DB_RAM_waveforms.html
..........................\FEQCOEFF.v
..........................\FEQCOEFF.v.bak
..........................\FOUTRAM.bsf
..........................\FOUTRAM.qip
..........................\FOUTRAM.v
..........................\FOUTRAM_bb.v
..........................\FOUTRAM_inst.v
..........................\foutram_syn.v
..........................\FOUTRAM_wave0.jpg
..........................\FOUTRAM_wave1.jpg
..........................\FOUTRAM_waveforms.html
..........................\FREQ_EDGE_SYMBOL_0_7.v
..........................\FREQ_EDGE_SYMBOL_0_7.v.bak
..........................\FREQ_EDGE_SYMBOL_4_11HEAD.v
..........................\FREQ_EDGE_SYMBOL_4_11HEAD.v.bak
..........................\FREQ_EDGE_SYMBOL_4_11TAIL.v
..........................\FREQ_EDGE_SYMBOL_4_11TAIL.v.bak
..........................\HOLDFIVECLK.v
..........................\HOLDFIVECLK.v.bak
..........................\HOLDSEVENCLK.v
..........................\HOLDTWOCLK.v
..........................\HOLDTWOCLK.v.bak
..........................\INTERP.v
..........................\INTERP.v.bak
..........................\INTERP2DATA.v
..........................\INTERP5DATA.v
..........................\INTERP5DATA.v.bak
..........................\ORDER_CHANGE.v
..........................\PILOTS_CDIV.v
..........................\PILOTS_CDIV.v.bak
..........................\RESHAPERAM.bsf
..........................\RESHAPERAM.qip
..........................\RESHAPERAM.v
..........................\RESHAPERAM_bb.v
..........................\RESHAPERAM_inst.v
..........................\reshaperam_syn.v
..........................\RESHAPERAM_wave0.jpg
..........................\RESHAPERAM_wave1.jpg
..........................\RESHAPERAM_waveforms.html
..........................\SSDIV.bsf
..........................\SSDIV.qip
..........................\SSDIV.v
..........................\SSDIV_bb.v
..........................\SSDIV_inst.v
..........................\ssdiv_syn.v
..........................\SSMULTI.bsf
..........................\SSMULTI.qip
..........................\SSMULTI.v
..........................\SSMULTI14_27.bsf
..........................\SSMULTI14_27.qip
..........................\SSMULTI14_27.v
..........................\SSMULTI14_27_bb.v
..........................\SSMULTI14_27_inst.v
..........................\ssmulti14_27_syn.v
..........................\SSMULTI14_27_wave0.jpg
..........................\SSMULTI14_27_waveforms.html
..........................\SSMULTI_bb.v
..........................\SSMULTI_inst.v
..........................\ssmulti_syn.v
..........................\SSMULTI_wave0.jpg
..........................\SSMULTI_waveforms.html
..........................\transcript
..........................\simulation\modelsim\CHANNEL_ESTIMATION.vt
..........................\..........\........\CHANNEL_ESTIMATION.vt.bak
..........................\..........\........\CHANNEL_ESTIMATION_VERILOG.sft
..........................\..........\........\CHANNEL_ESTIMATION_VERILOG.vo