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low phase noise PLL-phd paper

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LOW PHASE NOISE DESIGN TECHNIQUESABSTRACT

Title of Dissertation :

LOW PHASE NOISE DESIGN TECHNIQUES FOR PHASE LOCKED LOOP BASED INTEGRATED RF FREQUENCY SYNTHESIZERS Weixin Kong, Doctor of Philosophy, 2005

Dissertation Directed By:

Professor H. C. Lin Department of Electrical and Computer Engineering

The explosive growth of wireless communication market today has brought an increasing demand for high performance radio-frequency integrated circuits (RFIC) at low cost. As a result, there is a great interest in integrating the various blocks of a communication system on a single chip transceiver. One of the most difficult components to integrate is the frequency synthesizer that generates the local oscillator (LO) carrier signal. The difficulty comes mostly from the very stringent phase noise performance requirements of
标签:PHASENOISEDESIGNTECHNIQUES
low phase noise PLL-phd paper
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