SystemVerilog_for_e_Experts_Ja...

SystemVerilog_for_e_Experts_Janick_BergeronSystemVerilog for e Experts― Understanding the Migration Process

Janick Bergeron Synopsys Scientist May 2006

2006 Synopsys, Inc.

Abstract
This document identifies the major differences between the e language as defined by the IEEE P1647/ D6 draft standard and the SystemVerilog language as defined by the IEEE Std. 1800 2005 standard. It explains the semantics of those differences and, where relevant, presents how similar functionality can be obtained using SystemVerilog. The document concludes that any verification environment based on e could easily and efficiently be implemented in SystemVerilog.

Introduction
Like any modern programming language, e and SystemVerilog have much in common. Both provide enumerated types, have a for-loop statement and support object-oriented programming.