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君正JZ4740 GPS参考原理图

资料介绍
jz4740_gps_v15

4

3

2

1

INGENIC
A A

RD4740_GPS Schematic Revision 1.0
Title
Cover Sheet
B

Page
1 2 3 4 5 6 7
C B

System Architecture Memory & FLASH Power RESET & RTC & JTAG LCD & SD CARD AUDIO & GPS Revision History

C

INGENIC Semiconductor Corporation
System Technology Department
Release Data: 2007.05.27

D

D

Title Size B Date:
5 4 3 2

INGENIC Semiconductor Co. Ltd
RD4740_GPS
Document Number

COVER
Thursday, January 17, 2008 Sheet
1

Rev 1.0 1 of 7

5

4

3

2

1

A

A

DEBUG BOARD Ethernet& Uart&Jtag

Speaker Header Amplifier KB2338-D
EMI BUS

MIC

LCD Touch

+1.8V/800MA USB
B

KB3511 Battery 4.2V 1100maH

Vout +/-8.5% RESET

NandFlash 128-256M

B

+3.3V/800MA

EMI BUS SDRAM CHIP 16-64MB

JZ4740
32bit RISC Typ. 400MHz 16KB Icache/16KB Dcache SRAM SDRAM NandFlash I/F MMU RTC WDT JTAG Mutim
标签:jz4740
君正JZ4740 GPS参考原理图
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