ST GSM Baseband DataSheet

BB0702_datasheetSTwBX5
GSM/GPRS Digital Baseband Controller
PRELIMINARY DATA

■ GSM/DCS or GSM/PCS phase 2+ ■ GPRS class 10 ■ HR, FR, EFR, AMR vocoders ■ ARM7TDMITM core (up to 39MHz) ■ Proprietary DSP core (up to 78MHz) with all memory on-chip

■ Flash interface with up to 256Mbits address space ■ Wide range of external interfaces

D N RA A L FT U SE
APPLICATION

■ Voice memo, multi-language recognition and conversation recording ■ Polyphonic melodies ■ I/O supply 1.88V ■ Advanced CMOS process

processor is in charge of the Layer 2 and Layer 3 protocol software as well as the Man-Machine Interface. External SRAM memories are required. In idle mode, the core supply may be reduced to 1.35V (with 1.88V I/Os) ensuring a long battery life.

■ IC core supply 1.35V minimum

■ Idle consumption 200uA (core at 1.3