SFI-4.1 16-Channel SDR Interface with Bus Alignment

SFI-4.1 16-Channel SDR Interface with Bus Alignment
Application Note: Virtex-5 FPGAs

R SFI-4.1 16-Channel SDR Interface with
Bus Alignment
XAPP856 (v1.2) May 19, 2007 Author: Greg Burton



Summary This application note describes an SFI-4.1 interface, a 16-channel, source-synchronous LVDS
interface operating at single data rate (SDR). The transmitter (TX) requires 16 LVDS pairs for
data and one LVDS pair for the forwarded clock. The transmitte