计算PDC的最大处理速率(HSP50214,HSP50214A和HSP50214B)

Calculating Maximum Processing Rates of the PDC (HSP50214, HSP50214A and HSP50214B)

Calculating Maximum Processing Rates of the
PDC (HSP50214, HSP50214A and HSP50214B)
Application Note January 1999 AN9720.2



Introduction BAND OF INTEREST
Configuring the Programmable Digital Downconverter (PDC)
requires selecting clock, decimation and interpolation rates for
the various filter sections. Each filter section has limitations due
to the hardware implementation. Furthermore, the input and INPUT SPECTRUM
output rates of the various secti