资料介绍
DSP/FPGA
VHDL设计举例:步进电机控制器程序设计
发布日期:2009-3-22 11:07:31 文章来源:搜电 浏览次数: [pic]270
[pic][pic][pic]LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.std_logic_unsigned.ALL;
USE IEEE.std_logic_arith.ALL;
ENTITY step_motor IS
PORT(
f, p, d: IN STD_LOGIC:='0';
speed : in STD_LOGIC_VECTOR(1 downto 0);
coil : OUT STD_LOGIC_VECTOR(3 downto 0)
);
END step_motor;
ARCHITECTURE behavior OF step_motor IS
SIGNAL ind_coil: STD_LOGIC_VECTOR(3 downto 0) := "0001";
SIGNAL clk_scan: STD_LOGIC;
SIGNAL PHASE,DIRECTION:STD_LOGIC;
signal t:std_logic_vector(3 downto 0);
signal comp:integer range 0 to 2500 ;
SIGNAL osc:STD_LOGIC;
BEGIN
coil <= t;
process(f,osc)
variable delay:integer range 0 to 50;
begin
if (f'event and f='1') then