The Need for Dynamic Phase Alignmentin High-Speed FPGAs

With the explosion of data, voice, and video traffic across many markets, FPGAs are now being used in applications
that require data transmission speeds in the gigabits per second (Gbps) range and beyond. Well suited to these applications,
FPGAs provide the flexibility needed to handle the rapidly evolving standards that characterize this design
space. Programmable logic solutions allow developers to rapidly bring their products to market by avoiding the long
development times, high non-recurring engineering costs (NREs), and inventory risks associated with custom solutions.
FPGAs offering embedded silicon implementations of dynamic phase alignment (DPA) represents a significant
advancement in the capabilities of programmable logic, and provides an important complement or in some cases
alternative to high-speed clock-data recovery (CDR) transceiver technology for multi-gigabit signaling. This white
paper describes the advantages of DPA technology and the benefits of incorporating it into FPGA products.