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首页 > 分享下载 > 嵌入式系统 > 此包为三态以太网控制IP核,包内包含了仿真环境,说明文档,综合结果等文件

此包为三态以太网控制IP核,包内包含了仿真环境,说明文档,综合结果等文件

资料介绍
bench
.....\verilog
.....\.......\altera_mf.v
.....\.......\host_sim.v
.....\.......\Phy_sim.v
.....\.......\reg_int_sim.v
.....\.......\tb_top.v
.....\.......\User_int_sim.v
doc
...\Tri-mode_Ethernet_MAC_Specifications.pdf
...\Tri-mode_Ethernet_MAC_Verification_plan.pdf
EDK
...\edk_user_repository.tar.gz
rtl
...\verilog
...\.......\afifo.v
...\.......\Clk_ctrl.v
...\.......\eth_miim.v
...\.......\header.v
...\.......\MAC_rx
...\.......\......\Broadcast_filter.v
...\.......\......\CRC_chk.v
...\.......\......\MAC_rx_add_chk.v
...\.......\......\MAC_rx_ctrl.v
...\.......\......\MAC_rx_FF.v
...\.......\MAC_rx.v
...\.......\MAC_top.v
...\.......\MAC_tx
...\.......\......\CRC_gen.v
...\.......\......\flow_ctrl.v
...\.......\......\MAC_tx_addr_add.v
...\.......\......\MAC_tx_Ctrl.v
...\.......\......\MAC_tx_FF.v
...\.......\......\Ramdon_gen.v
...\.......\MAC_tx.v
...\.......\miim
...\.......\....\eth_clockgen.v
...\.......\....\eth_outputcontrol.v
...\.......\....\eth_shiftreg.v
...\.......\....\timescale.v
...\.......\Phy_int.v
...\.......\reg_int.v
...\.......\RMON
...\.......\....\RMON_addr_gen.v
...\.......\....\RMON_ctrl.v
...\.......\....\RMON_dpram.v
...\.......\RMON.v
...\.......\TECH
...\.......\....\altera
...\.......\....\......\CLK_DIV2.v
...\.......\....\......\CLK_SWITCH.v
...\.......\....\......\duram.v
...\.......\....\CLK_DIV2.v
...\.......\....\CLK_SWITCH.v
...\.......\....\duram.v
...\.......\....\xilinx
...\.......\....\......\CLK_DIV2.v
...\.......\....\......\CLK_SWITCH.v
...\.......\....\......\duram.v
sim
...\rtl_sim
...\.......\modsim_sim
...\.......\..........\bin
...\.......\..........\...\com.mod
...\.......\..........\...\ip_32W_check.dll
...\.......\..........\...\ip_32W_gen.dll
...\.......\..........\...\sim.mod
...\.......\..........\...\sim_only.mod
...\.......\..........\...\vlog-rtl.list
...\.......\..........\data
...\.......\..........\....\1000Mbps_duplex.vec
...\.......\..........\....\100Mbps_duplex.vec
...\.......\..........\....\10Mbps_duplex.vec
...\.......\..........\....\46-100.ini
...\.......\..........\....\46-46.ini
...\.......\..........\....\46-50.ini
...\.......\..........\....\46-80.ini
...\.......\..........\....\47-47.ini
...\.......\..........\....\48-48.ini
...\.......\..........\....\batch.dat
...\.......\..........\....\config.ini
...\.......\..........\....\CPU.vec
...\.......\..........\....\flow_ctrl.vec
...\.......\..........\....\source_mac_replace.vec
...\.......\..........\....\target_mac_check.vec
...\.......\..........\log
...\.......\..........\...\ncsim.log
...\.......\..........\script
...\.......\..........\......\batch_mode.tcl
...\.......\..........\......\filesel.tcl
...\.......\..........\......\run.tcl
...\.......\..........\......\run_proc.tcl
...\.......\..........\......\set_reg_data.tcl
...\.......\..........\......\set_stimulus.tcl
...\.......\..........\......\start_verify.tcl
...\.......\..........\......\user_lib.tcl
...\.......\ncsim_sim
...\.......\.........\bin
...\.......\.........\...\cds.lib
...\.......\.........\...\com.nc
标签:FPGA资源Xilinx
此包为三态以太网控制IP核,包内包含了仿真环境,说明文档,综合结果等文件
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