MPEG-1 Layer III Audio Codec Optimization and
Implementation on a DSP Chip
摘要: @篇文提出一套MP3解a的最佳化演算法及有效的16位元定cDSPF。在MP3a最佳化中，我基於移除算量大的心e模型，提出一套新的速率控制圈演算法，K裼妙l控制及B位元分配等。在MP3解a最佳化中，我提出一套新的解量化方程式F法，K可m用在定c理器中；在FIMDCT和子lШ铣缮希也裼昧丝焖傺菟惴āＮMP3解a最佳化的演算法F在一w16位元定cDSP，ADSP-2181上，K裼B定c格式降低定c\算r的失真。F後的MP3a器H需21.05 MIPS及44千位元Mw，而解a器H需18.67 MIPS及44.3千位元Mw，相^於其他商I化a品及Wg研究，能提供最好的效能。最後，本篇文提出一基於32位元RISC及DSP的p核心嵌入式系y整合O。
This thesis presents the algorithm optimization and efficient 16-bit fixed point DSP implementation of MP3 encoding and decoding algorithms. In the MP3 encoding algorithm, we propose several approaches including the removal of psychoacoustic model, simplified iteration loop, fast rate control loop and applying of bandwidth control and dynamic bit allocation proportional to the energy of granules. In the MP3 decoding algorithm, we propose a fast dequantization method with high SNR in fixed point implementation and apply fast algorithms in IMDCT and subband synthesis. The algorithms are also completely realized on a 16-bit fixed point DSP, ADSP-2181, and the dynamic fixed point format is applied to improve audio quality. The MP3 encoder consumes 21.05 MIPS and 44k bytes memory, and the MP3 decoder consumes 18.67 MIPS and 44.3k bytes memory. Both have superior performance than other commercial products and paper works. Finally, this thesis also presents an integrated design of a dual core embedded system with a 32-bit RISC, Intel StrongARM SA-1110, and ADSP-2181 DSP.
文目次: ABTRACT (CHINESE) i
ABTRACT (ENGLISH) ii
ACKNOWLEDGEMENTS iii
AWARDS iv
CONTENTS vi
LIST OF FIGURES ix
LIST OF TABLES xi
CHAPTER 1. INTRODUCTION 1
1.1 MPEG/Audio Compression 1
1.2 Motivations 2
1.3 The Overview of The Proposed Method and Contributions 3
1.4 The Experimental Results and Potential Applications 3
1.5 Content and Organization 4
CHAPTER 2. ENCODER OPTIMIZATION 6
2.1 Encoding Overview and Complexity Analysis 6
2.1.1 Psychoacoustic model II 7
2.1.2 Time to frequency mapping transform 9
2.1.3 Iteration loop 12
2.1.4 Bitstream formatting 13
2.2 Simplified PAM-II 14
2.2.1 Distortion control loop analysis 15
2.2.2 Removal of window switching 18
2.3 Fast rate control loop 21
2.3.1 Non-uniform quantization 22
2.3.2 Dynamic bit allocation proportional to the energy of granules 26
2.3.3 Precise initialization of the quantization parameter 27
2.3.4 Fast search of the optimal quantizer parameter 31
CHAPTER 3. DECODER OPTIMIZATION 36
3.1 Decoding Overview and Complexity Analysis 36
3.2 Dequantization 38
3.3 IMDCT and Subband Synthesis 42
CHAPTER 4. DSP IMPLEMENTATION 43
4.1 Target DSP Architecture 43
4.2 Data precision optimization in the proposed MP3 encoder 45
4.3 Data precision optimization in the proposed MP3 decoder 50
CHAPTER 5. EXPERIMENTAL RESULTS 53
CHAPTER 6. DUAL CORE EMBEDDED SYSTEM 58
6.1 System Overview 58
6.2 Hardware Platform 59
6.2.1 Host system C AdvanTech PCM-7130 SBC 59
6.2.2 DSP system C ADI ADSP-2181 EZ-LAB 61
6.2.3 Design of hardware adapter 62
6.3 Firmware Design 66
6.3.1 Linux Character Device Driver 66
6.3.2 DSP BIOS 69
CHAPTER 7. CONCLUSIONS AND FUTURE WORKS 71
7.1 Conclusions 71
7.2 Future Works 72
REFERENCE 74
APPENDIX 78
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