allegro constraints

allegro constrainsAllegro constraints

Constraints
On line DRC on Set standard values : All etch : * line to line : * line to pads : * Etch on subclass : allowed same net DRC : of f

pad to pad : *

line with : 4 mils

Extended design rules: Spacing rule set: Attach property, nets.. Set values: Constrain set name: RF Subclass: all etch Global fields are used to set multiple constraints only : Global Pin to pin : 5 mils Line to pin :4 mils Line to line :4 mils Via to pin: 4 mils Via to via : 4 mils Via to line : 4 mils Shape to pin :12 mils Shape to via :12 mils Shape to line :12mils Shape to shape :12mils No paired Same net DRC :off Min BB via gap: 0 mils Thru pin ,Smd pin, Test pin To thru pin : 5 mils To SMD pin :5 mils To test pin :5 mils To thru Via : 4 mils To test Via : 4 mils To B/B via :4 mils To li