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PLL-LAYOUT

资料介绍
PLL layoutPLL Layout

Outline
1. Introduction 2. Charge Pump PLL Linear Analysis 3. Phase Noise Analysis 4. Circuit Design and Simulation 5. Layout and Post-Layout Simulation 6. Chip Measurements 7. Conclusion

1. Introduction
Phase-locked loops are building blocks used extensively in many analog and digital system. Applications: (1) Clock/data recovery (2) Frequency synthesis/generation (3) Frequency modulation/demodulation The PLL does two jobs: (1) if Vref(t) differs from VCO in frequency, the PLL adjust its frequency to equal the input frequency. (called latching). (2) Once the PLL adjusted in frequency, locked, it must hold that frequency by developing a voltage, which is related to a phase difference, to enable it to stay locked in frequency to the input frequency.

Generally, the phase comp
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PLL-LAYOUT
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