FPGA设计重利用方法

FPGA设计重利用方法（Design Reuse Methodology）Xilinx Design Reuse Methodology for ASIC and FPGA Designers
SYSTEM-ON-A-CHIP DESIGNS REUSE SOLUTIONS

Xilinx

An Addendum to the:

REUSE METHODOLOGY MANUAL
FOR SYSTEM-ON-A-CHIP DESIGNS

2

Table of Contents
1 Introduction ......................................................................................... 3
1.1 System-on-a-Reprogrammable Chip ....................................................................3 1.2 Why Use an FPGA?.............................................................................................4 1.2.1 ASIC vs. FPGA Design Flows .....................................................................4 1.3 A Common Design Reuse Strategy ......................................................................6

2

System Level Reuse Issues for FPGAs .............