资料介绍
Schematic Diagram for D100(A)1
2
3
4
5
6
7
8
A
A
U101
1 2
C101 33PF C103 C102 2.2UF 100NF C105 33PF C104 33PF C107 10UF 10V C108 100NF
TA_VEXT
ISENSE DRIVE GND VCC VSENSE PROG
6 5 4
C106 10UF 6.3V
VBAT
3
LTC1734ES6-4.2#TR
B
VBAT
B
Q102 UMH9N-TN 1
VCCB
6
R101 0
VBAT
CHG_ON
2 5
VREF
VOSC VCCA
R103 47K,1%
TA_VEXT
R102
10K
ICHRG
R104 3K
49
50
51
29
28
6
SIM_RST
SIM_CLK
SIM_IO
GNDQ
SIMRST SIMCLK SIMDATA C
54
UP_RST 53 UP_CLK 52 UP_IO
GNDD1
CREF
R105 0
3
4
VDD67 41
44 ADC_AUX1 45 ADC_AUX2 56 ADC_TRIG 3 VACC 2 VBAT
C
32 VL5S_A 31 VL5S_B
C109 1UF
C110 1UF
TA_VEXT PWR_ON JIG_ON RTCALARM PWR_KEEP
R106 330K
1 VEXT 43 BTEMP 46 47 PWR_SW1N PWR_SW2 13 RTC_ALMN 21 PWR_KEEP 20 PSW1_BUF 14 INTRQ 15 SDI 16 SDO 17 SCLK 18 CSN 22 23 24 25 26 27 EN_3 EN_4[0] EN_4[1] EN_5 EN_5A EN_5B
VD