资料介绍
HG-V730_原理图6
5
4
3
2
1
D
MICBIAS
U101-B U101-A
D
K6 [2] [2] [2] [2] [5] [5] L101 700@1GHz C101 1 2 2 [2] [2] [2] [2] AU_OUT0_P AU_OUT0_N MP3_OUTR MP3_OUTL MICP0 MICN0 MICP1 MICN1 FM_INR FM_INL E3 D2 B2 C1 F4 G5 E5 F6 C3 F8 J3 K4 T6 T4 R3 U5 V6 R102 R103 R104 R105
0R 0R 0R 0R
AU_MICBIAS AU_IN0_P AU_IN0_N AU_IN1_P AU_IN1_N AU_FMINR AU_FMINL
JRTCK JTDO JTDI JTCK JTMS JTRST_B APC
JTAG
VCORE
AP6 AL5 AM6 AJ9 AK8 AL7 E9 F10 D10 E11
1 1 1 1 1 1
TP101 TP102 TP103 TP104 TP105 TP106 VAPC [6] [2] ADC2_ACC TP107 1
[3] [3] [3] [3] [3] [3] [3] [3] [3]
ECS0 ECS1 EUB ELB ERD EWR EWAIT ECLK EADV
AM12 ECS0_B AL13 ECS1_B AJ15 ECS2_B/MFIQ/GPIO14 AJ21 AM20 AK14 AK20 AM22 AJ13 AN11 EUB_B ELB_B ERD_B EWR_B EWAIT ECLK EADV_B
Audio
AU_OUT0_P AU_OUT0_N AU_MOUTR AU_MOUTL SPK1_P SPK1_N GPIO64/EINT0 GPIO63/EINT
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