《ARM和Thumb-2指令集快速参考卡》ARM and Thumb-2 Instruction Set
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Key to Tables
Rm {,
} See Table Register, optionally shifted by constant
See Table Flexible Operand 2. Shift and rotate are only available as part of Operand2. A comma-separated list of registers, enclosed in braces { and }.
See Table PSR fields. As , must not include the PC.
Either CPSR (Current Processor Status Register) or SPSR (Saved Processor Status Register) As , including the PC.
C*, V* Flag is unpredictable in Architecture v4 and earlier, unchanged in Architecture v5 and later. +/- 
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