高速 XC9500XL 设计计划

高速 XC9500XL 设计计划
APPLICATION NOTE
0




Planning for High Speed
XC9500XL Designs
XAPP115 September 28, 1998 (Version 1.0) 0 1 Application Note


Introduction Local Decoupling
CPLD design has advanced signicantly beyond that of fast
PAL design. Today's CPLDs must operate in systems that
include microprocessors, memories, I/O devices, buses,
multiple power supplies and multiple frequency clocks. The
actual logic design is frequent