【应用笔记】AN512:使用Stratix III器件的设计安全特性(AN 512: Using the Design Security Feature in Stratix III Devices)

【应用笔记】AN512:使用Stratix III器件的设计安全特性(AN 512: Using the Design Security Feature in Stratix III Devices)
在如今的充满高度竞争的商业和军事环境中，对数字设计师们来说设计安全来说是一个重要的考量。
In today’s highly competitive commercial and military environments, design security is
becoming an important consideration for digital designers. As FPGAs start to play a role in
larger and more critical system components, it is ever more important to protect the designs
from unauthorized copying, reverse engineering, and tampering. Stratix® III devices address
these concerns with the ability to decrypt a configuration bitstream using the 256-bit
Advanced Encryption Standard (AES) algorithm, an industry standard encryption
algorithm.
AN 512: Using the Design Security
Feature in Stratix III Devices

March 2009 AN-512-1.1




Introduction
In today’s highly competitive commercial and military environments, design security is
becoming an important consideration for digital designers. As FPGAs start to play a role in
larger and more critical system components, it is ever more important to protect the designs
from unauthorized copying, reverse engineering, and tampering. Stratix III devices address
these concerns with the ability