【应用笔记】10Gpbs以太网MAC和XAUI PHY互操作性硬件演示参考设计(10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design)

【应用笔记】10Gpbs以太网MAC和XAUI PHY互操作性硬件演示参考设计(10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design)
本应用笔记描述10Gpbs以太网媒体存取控制器MAC和XAUI PHY IP核互操作性硬件参考设计。
This application note describes a reference design that demonstrates the
interoperability of the Altera® 10-Gbps Ethernet (10GbE) Media Access Controller
(MAC) and XAUI PHY IP cores with a Dual XAUI to small form factor pluggable plus
(SFP+) high-speed mezzanine card (HSMC) board.
10-Gbps Ethernet MAC and XAUI PHY
Interoperability Hardware Demonstration
Reference Design
AN-638-1.1 Application Note




This application note describes a reference design that demonstrates the
interoperability of the Altera 10-Gbps Ethernet (10GbE) Media Access Controller
(MAC) and XAUI PHY IP cores with a Dual XAUI to small form factor pluggable plus