【应用笔记】Stratix与Stratix GX器件和DDR SDRAM的接口(Interfacing DDR SDRAM with Stratix & Stratix GX Devices)

【应用笔记】Stratix与Stratix GX器件和DDR SDRAM的接口(Interfacing DDR SDRAM with Stratix & Stratix GX Devices)
传统上，具有FPGA的系统使用单数据速率(SDR)SDRAM,它在时钟信号的每个上升沿传送数据。
Traditionally, systems featuring FPGAs used single data rate (SDR)
SDRAM, which transmits data on each rising edge of the clock signal. The
total amount of data an SDR memory device can send or receive is equal
to the clock speed multiplied by the bus width. To increase the data-rate
transmission, one of those parameters must increase. With dual-edge
clocking, double data rate (DDR) SDRAM can transmit data on both the
rising and falling edge of the clock signal. DDR SDRAM effectively
doubles the amount of data sent compared to SDR SDRAM without
increasing the clock speed or the bus width.
DDR SDRAM devices are widely used for a broad range of applications
such as embedded processor systems, image processing, storage,
communications, and networking. Stratix and Stratix GX devices can
interface with DDR SDRAM in component or module configurations up
to 200 MHz/400 Mbps. Tables 1 and 2 show the DDR SDRAM interface
support in Stratix and Stratix GX devices.
Interfacing DDR SDRAM with
Stratix & Stratix GX Devices

December 2005 ver. 2.0 Application Note 342




Introduction
Traditionally, systems featuring FPGAs used single data rate (SDR)
SDRAM, which transmits data on each rising edge of the clock signal. The
total amount of data an SDR memory device can send or receive is equal
to the clock speed multiplied by the bus width. To increase the data-rate
transmission, one of those parameters must increase. With dual-edge