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首页 > 分享下载 > 嵌入式系统 > 【应用笔记】使用FPGA为TI TMS320C6000做外设扩展与协处理器(FPGA Peripheral Expansion & FPGA Co-Processing with a TI TMS320C6000)

【应用笔记】使用FPGA为TI TMS320C6000做外设扩展与协处理器(FPGA Peripheral Expansion & FPGA Co-Processing with a TI TMS320C6000)

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【应用笔记】使用FPGA为TI TMS320C6000做外设扩展与协处理器(FPGA Peripheral Expansion & FPGA Co-Processing with a TI TMS320C6000)
本应用笔记描述了外设和协处理器如何添加到德州仪器(Texas Instrument,TI)的TMS320C6000系列数字信号处理器件中去。
This application note describes how peripherals and co-processors can be
added to Texas Instrument’s (TI’s) TMS320C6000 family of digital signal
processing (DSP) devices. The hardware interface is a connection
between TI's external memory interface (EMIF) and a first-in first-out
(FIFO) buffer. In the Altera? Ateme EMIF reference design, a fast Fourier
transform (FFT) co-processor and an LED peripheral provide examples of
how a system can be developed using Altera development tools and
architecture elements. The architecture provides flexibility to allow many
types of peripherals and co-processors. The concept is demonstrated on
Ateme's DMDK642 development board, which features a TI DM642
digital media processor and an Altera EP1C20 Cyclone? FPGA.
FPGA Peripheral Expansion &
FPGA Co-Processing
with a TI TMS320C6000
July 2004, ver 1.0 Application Note 352



Introduction This application note describes how peripherals and co-processors can be
added to Texas Instrument’s (TI’s) TMS320C6000 family of digital signal
processing (DSP) devices. The hardware interface is a connection
between TI's external memory interface (EMIF) and a first-in first-out
(FIFO) buffer. In the Altera Ateme EMIF reference design, a fas……
【应用笔记】使用FPGA为TI TMS320C6000做外设扩展与协处理器(FPGA Peripheral Expansion & FPGA Co-Processing with a TI TMS320C6000)
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