【应用笔记】实现多重遗留的DDR/DDR2 SDRAM控制器接口(Implementing Multiple Legacy DDR/DDR2 SDRAM Controller Interfaces)

【应用笔记】实现多重遗留的DDR/DDR2 SDRAM控制器接口(Implementing Multiple Legacy DDR/DDR2 SDRAM Controller Interfaces)
本应用笔记详细描述了在单个FPGA中设计多重遗留的DDR2控制器的步骤。
This application note details the steps for designing multiple legacy
DDR2 controllers into a single FPGA. After reading this application note
you should be able to understand important design considerations such
as PLL and DLL resource allocation, timing analysis, and debugging.
Implementing Multiple
Legacy DDR/DDR2 SDRAM
Controller Interfaces


July 2007, v2.0 Application Note 392

Introduction This application note details the steps for designing multiple legacy
DDR2 controllers into a single FPGA. After reading this application note
you should be able to understand important design considerations such
as PLL and DLL resource allocation, timing analysis, and debugging.

f If you want to implement ALTMEMPHY based multiple controllers,
refer to A