【应用笔记】在Stratix II器件中使用altlvds宏功能模块和外部PLL选项(Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices)

【应用笔记】在Stratix II器件中使用altlvds宏功能模块和外部PLL选项(Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices)
当你使用Stratix II、HardCopy II或Cyclone II器件时，altlvds宏功能模块允许你例化一个外部锁相环(PLL)。这个外部PLL是一个在LVDS模式下的快速PLL设置。
The altlvds megafunction allows you to instantiate an external
phase-locked loop (PLL) when using Stratix® II, HardCopy® II, or
Cyclone™ II devices. This external PLL is a fast PLL set-up in LVDS
mode. This option gives you more control over the PLL settings, and
gives you access to PLL options such as bandwidth and dynamic
reconfiguration, which are unavailable when instantiating the
serializer/deserializer (SERDES) circuitry using the altlvds
megafunction.
Design Example Using the altlvds
Megafunction & the External PLL
Option in Stratix II Devices
March 2006, ver. 1.0 Application Note 409



Introduction The altlvds megafunction allows you to instantiate an external
phase-locked loop (PLL) when using Stratix II, HardCopy II, or
Cyclone II devices. This external PLL is a fast PLL set-up in LVDS
mode. This option gives you more control over the PLL settings, and
gives you access to PLL options such as bandwidth and dynamic
reconfi