【应用笔记】Cyclone III设计指南(Cyclone III Design Guidelines)

【应用笔记】Cyclone III设计指南(Cyclone III Design Guidelines)
Altera公司的Cyclone III系列FPGA器件是一种成本优化的、富含存储器的FPGA系列。Cyclone III FPGA是由台湾积体电路制造有限公司(台积电,TSMC)采用65nm低功耗(LP)处理技术(附加硅片优化和软件功能)来最小化功率消耗。
The Cyclone® III FPGA family offered by Altera® is a cost-optimized, memory-rich
FPGA family. Cyclone III FPGAs are built on Taiwan Semiconductor Manufacturing
Company's (TSMC) 65-nm low-power (LP) process technology with additional silicon
optimizations and software features to minimize power consumption. With this third
generation in the Cyclone series, Altera broadens the number of high volume,
cost-sensitive applications that can benefit from FPGAs. With a good design practice
and a clear understanding of the design flow of the Cyclone III device, your design
flow will be much easier. This design guideline summarizes not only the various
aspects of the Cyclone III device, but also the Quartus® II software features that you
should look into when designing with the Cyclone III devices.
Cyclone III Design Guidelines


November 2008 AN-466-1.2




Introduction
The Cyclone III FPGA family offered by Altera is a cost-optimized, memory-rich
FPGA family. Cyclone III FPGAs are built on Taiwan Semiconductor Manufacturing
Company's (TSMC) 65-nm low-power (LP) process technology with additional silicon
optimizations and software features to minimize power consumption. With this third
generation in the Cyclone series, Altera broadens the number of high volume,
cost-sensitive applications t