【应用笔记】三倍速以太网数据路径参考设计(Triple Speed Ethernet Data Path Reference Design)

【应用笔记】三倍速以太网数据路径参考设计(Triple Speed Ethernet Data Path Reference Design)
Altera公司的三倍速以太网(Triple Speed Ethernet,TSE)数据路径参考设计，提供了一个SOPC Builder系统的样例。该样例使用TSE MegaCore函数和两个串行收发器。该参考设计演示了Altera的TSE MegaCore函数在硬件上所能达到的最大网速的操作。该设计能够使你评估集成到Altera的FPGA设计内部的TSE MegaCore函数。
The Altera? Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore?
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.
Triple Speed Ethernet Data
Path Reference Design

June 2009, ver. 1.1 Application Note 483



Introduction The Altera Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.