【应用手册】Power Optimization in Stratix IV FPGAs

【应用手册】Power Optimization in Stratix IV FPGAs
The Stratix® IV family of devices from Altera is based on 0.9 V, 40 nm
Process technology. Stratix IV FPGAs deliver a high level of performance
and power efficiency for high-end applications. The innovative
architecture of Stratix IV devices is optimized to get the maximum power
saving through a variety of process, circuit, and architecture
optimizations and innovations. The advanced architecture of Stratix IV
devices features triple-gate oxide, all-copper routing with low-k dielectric
material that dramatically reduces power and improves performance.
Stratix IV devices include advanced, efficient logic structures called
adaptive logic modules (ALMs) that obtain maximum performance while
minimizing power consumption.
Altera provides the Quartus® II PowerPlay Power Analyzer tool to aid
you during the design process by delivering fast and accurate estimations
of power consumption. You can use this information to locate the blocks
in your design that are consuming the most power and target those blocks
to minimize the power consumption of your design.
Power Optimization in
Stratix IV FPGAs

May 2008, ver.1.0 Application Note 514



Introduction The Stratix IV family of devices from Altera is based on 0.9 V, 40 nm
Process technology. Stratix IV FPGAs deliver a high level of performance
and power efficiency for high-end applications. The innovative
architecture of Stratix IV devices is optimized to get the maximum power
saving through a variety of process, circuit, and architecture
optimizations and innovations. The advanced arch