利用 CoolRunner CPLD 设计 16b/20b 编码器/解码器

利用 CoolRunner CPLD 设计 16b/20b 编码器/解码器
Application Note: CoolRunner

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Design of a 16b/20b Encoder/Decoder
Using a CoolRunner XPLA3 CPLD
XAPP336 (v1.3) January 15, 2003


Summary This document details the VHDL implementation of a fibre channel byte-oriented transmission
encoder and decoder in a Xilinx CoolRunner XPLA3 CPLD. CoolRunner CPLDs are the
lowest power CPLDs available today and can be utilized in any network design wh