Connecting Virtex-6 FPGAs to ADCs with Serial LVDS Interfaces and DACs with Parallel LVDS Interfaces

Connecting Virtex-6 FPGAs to ADCs with Serial LVDS Interfaces and DACs with Parallel LVDS Interfaces
Application Note: Virtex-6 FPGAs

Connecting Virtex-6 FPGAs to ADCs with
Serial LVDS Interfaces and DACs with Parallel
LVDS Interfaces
XAPP1071 (v1.0) June 23, 2010 Author: Marc Defossez


Summary This application note describes how to utilize the dedicated deserializer (ISERDES) and
serializer (OSERDES) functionalities in Virtex-6 FPGAs to interface with