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Dynamically Programmable DRU for High-Speed Serial I/O

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Dynamically Programmable DRU for High-Speed Serial I/O
Application Note: Virtex-5 FPGAs

Dynamically Programmable DRU for
High-Speed Serial I/O
Author: Paolo Novellini and Giovanni Guasti
XAPP875 (v1.1) January 13, 2010


Summary Multi-service optical networks today require the availability of transceivers that can operate
over a wide range of input data rates. High-speed serial I/O has a native lower limit for operating
data rates, pr……
标签:xilinxfpga
Dynamically Programmable DRU for High-Speed Serial I/O
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