CPLD 多电压系统设计

CPLD 多电压系统设计
Application Note: CPLD XC9500/XL Family

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Designing CPLD Multi-voltage Systems
XAPP144 (v1.3) March 14, 2000



Summary This application note discusses XC9500/XL use in multi-voltage systems.




Introduction Today’s digital systems combine a myriad of chips with different voltage configurations.
Designers must interface 2.5V processors with 3.3V memories―both RAM and ROM―as well
as 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDs
are idea