首页|嵌入式系统|显示技术|模拟IC/电源|元件与制造|其他IC/制程|消费类电子|无线/通信|汽车电子|工业控制|医疗电子|测试测量
首页 > 分享下载 > 嵌入式系统 > 【应用手册】General-Purpose PLLs in Stratix & Stratix GX Devices

【应用手册】General-Purpose PLLs in Stratix & Stratix GX Devices

资料介绍
【应用手册】General-Purpose PLLs in Stratix & Stratix GX Devices
Stratix® and Stratix GX devices have highly versatile phase-locked loops
(PLLs) that provide robust clock management and synthesis for on-chip
clock management, external system clock management, and high-speed
I/O interfaces. There are two types of PLLs in each Stratix and Stratix GX
device: enhanced PLLs and fast PLLs. Each device has up to four
enhanced PLLs, which are feature-rich, general-purpose PLLs supporting
advanced capabilities such as external feedback, clock switchover, phase
and delay control, PLL reconfiguration, spread spectrum clocking, and
programmable bandwidth. There are also up to eight fast PLLs per
device, which offer general-purpose clock management with
multiplication and phase shifting as well as high-speed outputs to
manage the high-speed differential I/O interfaces.
The Altera® Quartus® II software enables the PLLs and their features
without requiring any external devices.
1. General-Purpose PLLs in
Stratix & Stratix GX Devices

S52001-3.2




Introduction Stratix and Stratix GX devices have highly versatile phase-locked loops
(PLLs) that provide robust clock management and synthesis for on-chip
clock management, external system clock management, and high-speed
I/O interfaces. There are two types of PLLs in each Stratix and Stratix GX
device: enhanced PLLs and fast PLLs. Each device has up to four
enhanced PLLs, which are feature-rich, general-purpose PLLs supporting
标签:AlteraFPGAStratixPLL
【应用手册】General-Purpose PLLs in Stratix & Stratix GX Devices
本地下载

评论