资料介绍
This application note describes the software
implementation of I
2
C interface routines for the
PIC16CXXX family of devices. Only the master mode of
I
2
C interface is implemented in this application note.
This implementation is for a single master communica-
tion to multiple slave I
2
C devices.
Some PIC16CXXX devices, such as the PIC16C64 and
PIC16C74, have on-chip hardware which implements
the I
2
C slave interface, while other PIC16CXXX
devices, such as the PIC16C71 and PIC16C84, do not
have the same on-chip hardware.
This application note does not describe the I
2
C Bus
specifications and the user is assumed to have an
understanding of the I
2
C Bus. For detailed information
on the bus, the user is advised to read the I
2
C Bus
Specification document from Philips/Signetics (order
number 98-8080-575). The I
2
C Bus is a two-wire serial
bus with multiple possible masters and multiple possi-
ble slaves connected to each other through two wires.
The two wires consists of a clock line (SCL) and a data
line (SDA) with both lines being bi-directional. Bi-direc-
tional communication is facilitated through the use of
wire and connection (the lines are either active-low or
passive high). The I
2
C Bus protocol also allows collision
detection, clock synchronization and hand-shaking for
multi-master systems. The clock is always generated by
the master, but the slave may hold it low to generate a
wait state. M Software Implementation of I2C Bus Master
AN554
In most systems the microcontroller is the master and
Author: Amar Palacherla the external peripheral devices are slaves. In these
Microchip Technology Inc. cases this application note can be used to attach I2C
slaves to the PIC16CXXX (the master) microcontroller.
INTRODUCTION The multi-master system is not implemented because it
我要上传