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数字集成技术的高速双斜率A D转换

资料介绍
By using low-cost microprocessors and a program-controlled
numerical-integration technique, you can achieve good noise
rejection and take full advantage of the higher speeds offered by
recently developed dual-slope A/D converters such as the TC7109.
This and similar converters overcome the speed limitations
imposed by logic-gate and analog comparator delays in earlier
dual-slope devices, and the modern units can operate at rates as
high as 30 to 100 samples/sec. Nevertheless, operating them at
their maximum conversion rates often makes it difficult or impos-
sible to achieve the high normal-mode line-frequency rejection that
dual-slope A/D converters inherently offer at slower conversion
rates. Thus, noise considerations have often precluded use of
these converters at their rated speeds — especially in industrial
environments, where line-frequency and other low-frequency noise
components can be a particular problem.
AN788
Numerical-Integration Techniques Speed Dual-Slope A/D Conversion

The integrating A/D converter integrates the signal only in a certain
Author: Gary Grandbois and Wes Freeman,
time window, as Figure 1b shows. This limited integration period
Microchip Technology, Inc.
results in normal-mode noise rejection only when the integration
数字集成技术的高速双斜率A D转换
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