XAPP291 - Self-Addressing FIFO

XAPP291 - Self-Addressing FIFO
Application Note: Virtex-II Series and Spartan-3 Family

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Self-Addressing FIFO
Author: Nick Sawyer
XAPP291 (v1.3) June 3, 2005


Summary The block memories in the Virtex-II and Spartan-3 architectures are capable of supporting
data bus widths of up to 36-bits. A self-addressing FIFO reference design uses these block
memories to store both data and address information in a single memory location. This