降低HSP50016数字下变频器最低抽取速率

Reducing the Minimum Decimation Rate of the HSP50016 Digital Down Converter
TM
Reducing The Minimum Decimation Factor Of
The HSP50016 Digital Down Converter
Application Note January 1999 AN9401.1



Introduction
This Application Note discusses a method for reducing the The decimation occurs in a two step process. Once the
minimum decimation factor of the Intersil HSP50016 Digital center of the band of interest is shifted to DC by the
Down Converter (DDC). As will be described in detail in this quadrature modulator, the real a