PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations

PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations
Freescale Semiconductor Document Number: AN4039
Application Note Rev. 3, 01/2012




PowerQUICC and QorIQ
DDR3 SDRAM Controller Register
Setting Considerations
by Freescale Semiconductor, Inc.
Austin, TX



This application note expands on the description of the Contents
1. Configuration guidelines . . . . . . . . . . . . . . . . . . . . . . . 2
double data rate (DDR3) memory controller programmable 2. Register definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
registers in the PowerQUICC and QorIQ processor reference 3. Revisi